1. Field of the Invention
The present invention relates generally to semiconductor devices and particularly to structures of semiconductor devices that allows a high withstand voltage power device insulated gate bipolar transistor (IGBT) to have an improved electrical characteristic by shallowing a back surface structure and exposing it to protons in an optimized amount to improve low saturation voltage (Vce (sat))-offset voltage (Eoff) tradeoff to allow a semiconductor device having the high withstand voltage power device IGBT for electric power to have a stabilized characteristic and maintain robustness against destruction.
2. Description of the Background Art
For electric railroad applications, inverters and converters are controlled by employing semiconductor devices for electric power that are implemented as IGBT module. For electric railroad applications, high withstand voltage IGBTs mainly of 3.3 KV and 6.5 KV are employed.
A recent new specification required for electric railroad applications is to ensure operation at a low temperature of −55° C. In a conventional specification, for −55° C., low saturation voltage (Vce (sat))'s characteristic waveform is a negative temperature characteristic. Furthermore, current and voltage characteristic waveform is also a negative temperature characteristic.
When an n− type semiconductor substrate is exposed to a large quantity of protons, it has an increased defect layer. The increased defect layer means increased kernels for recombination. This results in a reduced lifetime. Note that minority carriers that are generated or remain recombine with majority carriers and thus disappear. An average time elapsing before they disappear is referred to as a lifetime. More correctly, it is referred to as a lifetime of minority carriers.
Lifetime indicates a positive temperature characteristic. Accordingly, for lower temperature, lifetime is further reduced and snapback phenomenon is increased. In other words, when an n− type semiconductor substrate is exposed to a large quantity of protons, a phenomenon similar in terms of lifetime to reduction in temperature will manifest.
Snapback phenomenon is determined by a product of injection efficiency by transport factor. If the product is small, a large snapback phenomenon manifests. Injection efficiency is determined by a difference in temperature of a pn junction of a back surface of the semiconductor substrate. Transport factor is determined by lifetime, an n− layer's thickness, the semiconductor substrate's inherent impurity concentration, and the like.
If the n− layer's thickness is large and the semiconductor substrate's inherent impurity concentration is small, a smaller transport factor is provided. When a high withstand voltage power device IGBT with such a small transport factor has a back surface containing an impurity reduced in concentration, snapback phenomenon more readily occurs. Accordingly it is important to expose the semiconductor substrate at the back surface to protons in an amount to control lifetime (or transport factor).
In contrast, for increased temperature, increased lifetime is provided. This is because high temperature provides an increased probability that minority carriers that have once recombined and thus disappeared are regenerated by thermal energy, resulting in increased, generated carriers. Accordingly, residual carriers increase, and a phenomenon similar to effectively increased lifetime will manifest. Japanese Patent Laying-open No. 2002-299623 discloses a high withstand voltage power device IGBT.